Patent No. US10771816 (titled "Method for deriving a motion vector") on Aug 19, 2019. The application was issued on Sep 8, 2020.
’816 is related to the field of video compression and motion estimation, specifically addressing the memory and computational overhead associated with motion vector competition. In modern video codecs, predicting the movement of image blocks by referencing previously decoded frames is essential for high efficiency. However, as block structures become more complex and resolutions increase, the amount of motion data that must be stored and processed in the reference buffer can become a significant bottleneck for hardware implementations.
The underlying idea behind ’816 is to reduce the memory footprint of reference motion data by applying a flooring function to the coordinates used to fetch temporal motion vector candidates. Instead of storing or accessing a unique motion vector for every possible small block in a reference frame, the system effectively downsamples the motion field. By using bitwise shift operations to align coordinates to a coarser grid, the decoder can retrieve a representative motion vector that serves as a reliable predictor without requiring the high-resolution storage of the entire preceding frame's motion grid.
The claims of ’816 focus on a method and apparatus that construct a candidate list for motion vector prediction by merging spatial neighbors with a specific temporal candidate. The temporal candidate is identified by taking the top-left coordinates of the current block and applying an arithmetic right shift followed by an arithmetic left shift of the same magnitude. This sequence of operations implements a hardware-efficient flooring function that selects a motion vector from a previous frame to be included in a merged competition list, which is then used to derive a motion vector difference for the final bitstream.
In practice, the invention works by creating a unified list of potential motion predictors from three spatial neighbors—the blocks above, to the left, and to the above-left—and combining them with the filtered temporal candidate. The use of the shift-based flooring mechanism ensures that the decoder always points to a consistent, grid-aligned location in the reference buffer. This allows the system to discard redundant motion data that does not fall on the grid, significantly lowering the requirements for the motion vector buffer while maintaining enough prediction accuracy to keep the motion vector difference small.
This approach differs from prior methods that either required storing every motion vector from a reference frame or used more complex interpolation schemes that increased computational load. By utilizing buffer compression through coordinate quantization, the invention provides a path for embedded systems to handle high-resolution video streams with limited memory. The innovation lies in the realization that a mathematically simplified, grid-based selection of temporal vectors provides a sufficient starting point for motion competition without the cost of full-resolution motion field storage.
In the early 2010s when ’816 was filed, video coding architectures were characterized by a transition toward higher coding efficiency at the cost of significant computational overhead. At a time when motion estimation and compensation were typically implemented using high-precision motion vectors, systems commonly relied on large, uncompressed memory buffers to store reference frame data and motion vector information. Hardware constraints made the management of these extensive datasets non-trivial, as the increasing resolution of video content placed severe pressure on the memory bandwidth and storage capacity of embedded decoding circuitry.
The disclosed invention addresses the technical problem of excessive memory consumption and hardware complexity associated with motion vector competition in video decoding. By integrating a buffer compression mechanism specifically for motion vector data, the architecture reduces the physical memory footprint required to store temporal and spatial predictors. This structural shift enables the decoder to maintain high-precision motion estimation while overcoming the technical constraint of limited on-chip storage, achieving a reduction in circuit cost and an increase in processing throughput without sacrificing the accuracy of the motion compensation process.
This patent contains 10 total claims, with claims 1 and 6 serving as the independent claims. The independent claims focus on a method and a corresponding apparatus for video processing that involves generating motion vector candidate lists from neighboring and previous frame blocks, specifically utilizing a flooring function based on arithmetic shift operations to derive coordinates for motion vector prediction and bitstream encoding. The dependent claims serve to provide specific operational details, such as removing duplicate vectors, handling intra-prediction blocks, and defining the precise geometric calculations used for determining intermediate block positions.
Definitions of key terms used in the patent claims.
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