Staircase Structure In Three-Dimensional Memory Device And Method For Forming The Same

Patent No. US12232313 (titled "Staircase Structure In Three-Dimensional Memory Device And Method For Forming The Same") was filed by Yangtze Memory Technologies Co Ltd on May 8, 2023.

’313 is related to the field of 3D NAND flash memory devices . As memory cell sizes shrink, planar memory architectures face density limitations. 3D memory architectures, which stack memory cells vertically, offer a solution to overcome these limitations. However, these 3D structures require staircase structures for word line fan-out, traditionally located at the edges of memory planes, leading to performance bottlenecks due to increased RC delay from unilateral word line driving.

The underlying idea behind ’313 is to introduce a center staircase structure within the memory array, effectively dividing it into two sections. This allows for bilateral word line driving, where row decoders drive word lines from the middle of the memory plane in opposite directions. To maintain electrical connectivity across the divided memory array, bridge structures are incorporated within the staircase structure, connecting word lines separated by the center staircase.

The claims of ’313 focus on a 3D memory device comprising a memory array structure divided into two sections by a staircase structure. The staircase structure includes a first staircase zone and a second staircase zone, connected by bridge structures. Each staircase zone features alternating sub-staircases with ascending and descending stairs at different depths. Crucially, at least one stair in each sub-staircase is connected to both memory array sections via the bridge structures.

In practice, the center staircase structure with bridge connections enables a bilateral word line-driving scheme . Each row decoder drives word lines in both directions from the center, effectively halving the word line length and significantly reducing the RC delay. The alternating ascending and descending sub-staircases within each staircase zone provide a compact and efficient layout for connecting to the various memory levels.

This design differentiates itself from traditional 3D NAND architectures by replacing side staircase structures with a central one. The bridge structures are essential for maintaining electrical continuity across the memory array, enabling the bilateral driving scheme. The alternating sub-staircase arrangement optimizes the use of space within the staircase zone, allowing for a high density of word line connections in a compact area.

How does this patent fit in bigger picture?

Technical landscape at the time

In the early 2020s when ’313 was filed, 3D memory architectures were gaining traction as a solution to overcome density limitations of planar memory cells, at a time when fabricating and controlling signals to and from these complex 3D memory arrays, especially staircase structures for word line fan-out, was non-trivial.

Novelty and Inventive Step

The examiner allowed the claims because the prior art of record, including Hwang, failed to teach or suggest a first bridge structure and a second bridge structure, each having a nominally flat top surface, separated by a gate line slit structure, in the claimed context of a staircase structure within a 3D memory device. The examiner also stated that an amendment overcame a double patenting rejection.

Claims

This patent contains 20 claims, with independent claims 1, 8, and 16. The independent claims are directed to a three-dimensional (3D) memory device comprising memory array structures, staircase structures, and bridge structures. The dependent claims generally elaborate on the specific configurations and features of the 3D memory device described in the independent claims.

Key Claim Terms New

Definitions of key terms used in the patent claims.

Term (Source)	Support for Specification	Interpretation
Ascending stairs (Claim 1, Claim 8, Claim 16)	“In one example, a 3D memory device includes a memory array structure and a staircase structure in an intermediate of the memory array structure and laterally dividing the memory array structure into a first memory array structure and a second memory array structure. The staircase structure includes a first staircase zone and a bridge structure connecting the first memory array structure and the second memory array structure. The first staircase zone includes a first pair of staircases facing each other in a first lateral direction and at different depths.”	Stairs that are arranged at different depths.
Bridge structure (Claim 1, Claim 8, Claim 16)	“In one example, a 3D memory device includes a memory array structure and a staircase structure in an intermediate of the memory array structure and laterally dividing the memory array structure into a first memory array structure and a second memory array structure. The staircase structure includes a first staircase zone and a bridge structure connecting the first memory array structure and the second memory array structure. At least one stair in the first pair of staircases is electrically connected to at least one of the first memory array structure and the second memory array structure through the bridge structure.”	A structure connecting staircase zones, having a nominally flat top surface, and providing electrical connection between memory array structures and stairs.
First staircase zone (Claim 1, Claim 8, Claim 16)	“In one example, a 3D memory device includes a memory array structure and a staircase structure in an intermediate of the memory array structure and laterally dividing the memory array structure into a first memory array structure and a second memory array structure. The staircase structure includes a first staircase zone and a bridge structure connecting the first memory array structure and the second memory array structure. The first staircase zone includes a first pair of staircases facing each other in a first lateral direction and at different depths.”	A region within the staircase structure that contains sub-staircases or pairs of staircases at different depths.
Gate line slit structure (Claim 1, Claim 8, Claim 16)	“In some 3D memory devices, memory cells for storing data are vertically stacked through a stacked storage structure (e.g., a memory stack). 3D memory devices usually include staircase structures formed on one or more sides (edges) of the stacked storage structure for purposes such as word line fan-out. As staircase structures are usually formed at the edges of each memory plane, memory cells are unilaterally driven by row decoders (also known as “x-decoders”) also arranged at the edges of each memory plane through the word lines and corresponding staircase structures.”	A structure that separates bridge structures and extends through the stack structure.
Staircase structure (Claim 1, Claim 16)	“In some 3D memory devices, memory cells for storing data are vertically stacked through a stacked storage structure (e.g., a memory stack). 3D memory devices usually include staircase structures formed on one or more sides (edges) of the stacked storage structure for purposes such as word line fan-out. As staircase structures are usually formed at the edges of each memory plane, memory cells are unilaterally driven by row decoders (also known as “x-decoders”) also arranged at the edges of each memory plane through the word lines and corresponding staircase structures.”	A structure located between memory array structures, comprising staircase zones and bridge structures, used for electrical connection.

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US12232313

YANGTZE MEMORY TECHNOLOGIES CO LTD

Application Number: US18144650
Filing Date: May 8, 2023
Status: Granted
Expiry Date: Mar 23, 2040
External Links: Slate, USPTO, Google Patents

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