Patent No. US12248681 (titled "Sequential Write Operations Using Multiple Memory Dies") was filed by Micron Technology Inc on Aug 9, 2022.
’681 is related to the field of memory systems, specifically addressing the challenge of improving write performance and endurance in memory devices. Modern memory systems, such as those using NAND flash, face limitations due to write amplification, where the amount of data physically written exceeds the data requested by the host. This is exacerbated by memory management operations like garbage collection and wear leveling. The patent aims to mitigate these issues, particularly in the context of sequential write operations and zoned namespace (ZNS) architectures.
The underlying idea behind ’681 is to distribute the initial write load across multiple memory dies operating at a lower storage density (e.g., SLC) for faster write speeds, and then consolidate the data onto a single die operating at a higher storage density (e.g., TLC or QLC). This "folding" process leverages the speed of lower-density storage for initial writes while ultimately achieving higher capacity through the higher-density storage. The key insight is that parallelizing the initial write across multiple dies improves throughput, while the final consolidation maintains high storage density.
The claims of ’681 focus on a memory system comprising multiple memory dies and processing circuitry. The system receives commands for a sequential write operation, including a command to open a zone in the file system. It then writes subsets of the data sequence in parallel to multiple "first" memory dies. Finally, it reads these subsets and writes the complete, ordered data sequence to a "second" memory die, respecting the initial sequential write order and the opened zone. Claim 9 focuses on writing to virtual blocks, and claim 11 focuses on a non-transitory computer-readable medium.
In practice, the memory system receives a write command from a host, which includes opening a zone for sequential writes. The system then divides the incoming data stream into subsets and writes each subset to a separate memory die configured for faster, lower-density storage like SLC. These writes occur concurrently, maximizing throughput. Once the initial writes are complete, the system reads the data subsets from each die and combines them, writing the complete data sequence to a single die configured for higher-density storage like TLC or QLC. This final write operation respects the sequential order specified by the host and the boundaries of the opened zone.
This approach differentiates itself from prior solutions by combining the benefits of parallel writing with high-density storage. Traditional systems either write directly to high-density storage, which can be slow, or use a single lower-density die as a cache, which limits throughput. By writing to multiple lower-density dies in parallel before consolidating, ’681 achieves both faster write speeds and efficient storage. Furthermore, by integrating this process with a ZNS architecture, the patent minimizes write amplification and improves the overall endurance of the memory system, while also mitigating temperature rise by distributing write operations across multiple dies.
In the early 2020s when ’681 was filed, memory systems commonly relied on zoned namespaces to reduce write amplification, at a time when throughput was typically limited by the write speed of a single memory die. At that time, memory management operations such as garbage collection and wear leveling were commonly used to extend the life of memory devices, when hardware constraints made balancing capacity, speed, and endurance non-trivial.
Claims 1-10 and 13-20 were rejected under 35 U.S.C. 103. Claim 11 was objected to as being dependent upon a rejected base claim. The rejection was based on obviousness over Yang et al. in view of Shatil et al. The Office action was made final.
This patent contains 18 claims, of which claims 1, 9, 11, and 18 are independent. The independent claims are generally directed to a memory system, a non-transitory computer-readable medium, and a method for writing data to memory dies. The dependent claims generally elaborate on the specifics of the memory system, such as the memory cell storage density and concurrent writing operations.
Definitions of key terms used in the patent claims.

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