Patent No. US6989825 (titled "Display control device") on May 9, 2001. The application was issued on Jan 24, 2006.
’825 is related to the field of display control systems, specifically targeting the reduction of power consumption in portable electronics. In traditional liquid crystal displays, a central processor updates a graphics buffer, and the entire contents of that buffer are periodically pushed to the display’s local memory. This constant full-frame refreshing wastes significant energy when only a small portion of the screen, such as a single icon or a line of text, has actually changed.
The underlying idea behind ’825 is to replace the wasteful full-frame refresh cycle with a targeted update mechanism that only transmits the specific area of the screen that has been modified. By monitoring the address bus during write operations, the system dynamically calculates the boundaries of the changed data. This allows the hardware to bypass the transmission of static pixels, significantly lowering the switching activity and bandwidth required to keep the display synchronized with the graphics memory.
The claims of ’825 focus on a write region detection means that tracks the specific memory addresses accessed by the processor when it updates image data. This detection logic identifies a bounding region—often a rectangle defined by the minimum and maximum horizontal and vertical coordinates of the modified pixels—that encompasses all recent changes. When a transfer command is triggered, the system only reads and sends the data within this calculated boundary to the display's local memory.
In practice, the invention functions as a hardware-level filter between the graphics buffer and the display driver. As the CPU writes new pixel data, the detection circuit updates four internal registers representing the bounding box of the change. Once the CPU signals that the update is complete, the transfer logic uses these registers to crop the outgoing data stream. The display's local memory then performs a partial rewrite, merging the new pixels with the existing image data already stored in its buffer to form a complete frame.
This approach differs from prior methods by eliminating the need for the CPU to manually define update coordinates or for the system to refresh the entire screen every frame. By automating the detection of the updated region directly from the address bus, the invention reduces the computational overhead on the processor while maximizing power efficiency. It provides a flexible solution where the update area can either be a tight rectangle around specific pixels or a simplified set of consecutive horizontal lines, balancing circuit complexity with energy savings.
In the early 2000s when ’825 was filed, display control architectures for portable equipment were typically implemented using a continuous refresh cycle where the entire contents of a graphics memory were periodically transferred to a display panel. At a time when systems commonly relied on full-frame data transmission regardless of the volume of updated pixel information, the high frequency of bus activity and data toggling created significant power consumption overhead. Hardware constraints in mobile devices made the management of these data transfer rates non-trivial, as the energy required to drive the interface between the controller and the display module was a primary drain on limited battery resources.
The disclosed invention achieves a reduction in power consumption through an architectural shift that replaces full-frame transfers with a selective data transmission scheme. By integrating a write region detection means that monitors addresses accessed by the image data writing means, the system dynamically identifies the specific boundaries of updated image data. This configuration enables the data transfer means to transmit only the modified region to the display, effectively minimizing unnecessary bus activity. The technical advancement lies in the ability to simplify the detection logic to specific vertical or rectangular coordinate ranges, balancing the reduction of transfer data volume with the minimization of circuit complexity within the detection hardware itself.
This patent contains a total of 11 claims, with claims 1, 6, and 7 serving as the independent claims. The independent claims focus on a display control system and machine-readable media designed to optimize data transfers by detecting specific memory addresses of image data to be updated and transferring only the identified region to a display device's memory. The dependent claims serve to further define the specific methods for calculating the update region, such as utilizing minimum and maximum vertical and horizontal coordinates to establish rectangular boundaries for the data transfer.
Definitions of key terms used in the patent claims.
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