Low density parity check (LDPC) code

Patent No. US7917829 (titled "Low density parity check (LDPC) code") on Jun 8, 2010. The application was issued on Mar 29, 2011.

What is this patent about?

’829 is related to the field of forward error correction, specifically focusing on the design and implementation of Low Density Parity Check (LDPC) codes. In modern digital communication, these codes are essential for maintaining data integrity across noisy channels by adding redundant parity bits. The technical challenge addressed here is the need for a flexible coding scheme that supports various block sizes and high data rates without requiring complex hardware re-wiring or computationally expensive encoding processes.

The underlying idea behind ’829 is the creation of a structured parity check matrix that balances high coding gain with hardware efficiency. By partitioning the matrix into a data portion and a parity portion, the invention utilizes a specific arrangement of sub-matrices—specifically shifted identity matrices—to allow for a recursive encoding algorithm. This approach avoids the heavy computational burden of full matrix inversion, instead enabling parity bits to be calculated through simple shift-and-sum operations that are easily mapped to parallel hardware architectures.

The claims of ’829 focus on a specific expanded parity check matrix designed for a code length of 1944 bits, utilizing an expansion factor of 81. The independent claims define the precise spatial arrangement of non-zero elements within an 8x24 base matrix structure, where each integer represents a circularly right-shifted identity matrix and each -1 represents an all-zero matrix. This specific configuration is optimized to ensure a minimum column weight of 3 in the data portion while maintaining a sparse, lower-triangular-like structure in the parity portion.

In practice, the invention works by taking a block of input data and applying the expanded matrix to generate a systematic codeword. The architecture is particularly effective because it supports multiple code rates, such as R=2/3, by scaling a base matrix through an expansion factor (L). For a code length of 1944, the system uses 81x81 sub-matrices, allowing the encoder to process large blocks of data while maintaining the low-density characteristics that make LDPC decoding efficient at the receiver.

This approach differentiates itself from prior LDPC implementations by optimizing the row weight distribution and ensuring the parity portion of the matrix is inherently structured for simple recursion. Unlike traditional random LDPC codes that require massive look-up tables or complex interconnects, the ’829 design uses a dual-diagonal-like parity structure that simplifies the hardware logic. This allows for high-throughput communication systems that can adapt to different block lengths without sacrificing the error-correction performance required for high-speed data transmission.

How does this patent fit in bigger picture?

Technical Landscape

In the mid-2000s when ’829 was filed, forward error correction in communication systems was typically implemented using architectures where the complexity of encoding and decoding was a primary hardware constraint. At a time when systems commonly relied on standard linear block codes or turbo codes, the implementation of Low Density Parity Check (LDPC) codes was often limited by the high computational overhead and wiring complexity required for large, unstructured parity check matrices. During this era, hardware constraints made the realization of high-throughput, low-power LDPC decoders non-trivial, as the random nature of traditional parity check matrices led to significant memory access bottlenecks and routing congestion in integrated circuit designs.

Prosecution Position

The disclosed invention represents a technical advancement through the development of a structured parity check matrix architecture that facilitates both efficient encoding and high-performance decoding. By constructing a base parity check matrix partitioned into specific data and parity portions and expanding it using shifted identity matrices, the architecture enables a recursive encoding algorithm that significantly reduces computational complexity. This structural shift allows for a sparse inverse of the parity portion, overcoming the traditional technical constraint of high encoder overhead. Furthermore, the integration of specific column weights and matrix dimensions enables the support of multiple coding rates and variable code lengths while maintaining high coding gains and reducing the physical wiring and power consumption requirements in hardware implementations.

Claims

This patent contains 14 total claims, with claims 1, 5, 6, and 10 serving as the independent claims. The independent claims focus on methods and apparatus for low-density parity-check encoding that utilize specific expanded parity check matrices to generate encoded data with a code length of 1944, where the matrices are defined by shifted identity and all-zero square matrices. The dependent claims serve to further define the encoding process by specifying the coding rate, dimensions, total weight, and specific structural configurations of the base parity check matrices from which the expanded matrices are derived.

Key Claim Terms New

Definitions of key terms used in the patent claims.

Term (Source)Support for SpecificationInterpretation
All-zero square matrix
(Claim 1, Claim 6)
The base parity check matrix is expanded into an expanded parity check matrix by replacing each zero element of the plurality of elements by a zero matrix. In the expanded parity check matrix, -1 represents an LxL all-zero square matrix.A square sub-matrix of size LxL (e.g., 81x81) where every element is zero, represented by the value -1 in the matrix description.
Base parity check matrix
(Claim 5, Claim 10)
The method comprises constructing a base parity check matrix H=[Hd|Hp], where Hd is a data portion and Hp is a parity portion. The base parity check matrix has a coding rate of R=1/2, 2/3, 3/4, 5/6, or 7/8 and is of a corresponding size such as 12x24 or 8x24.A smaller foundational matrix (e.g., size 8x24 or 12x24) containing binary or integer elements that defines the structural properties and coding rate of the resulting LDPC code.
Code length
(Claim 1, Claim 6)
The base parity check matrix is expanded by an expansion factor L of 27, thereby supporting a code length of up to 648. In other embodiments, the expansion factor and matrix size are configured to produce a code length of 1944.The total number of bits in a codeword produced by the LDPC encoding process, determined by the dimensions of the expanded parity check matrix.
Expanded parity check matrix
(Claim 1, Claim 6)
The base parity check matrix is expanded into an expanded parity check matrix by replacing each non-zero element by a shifted identity matrix and replacing each zero element by a zero matrix. In one embodiment, -1 represents an LxL all-zero square matrix, and other integers represent an LxL identity matrix, circularly right shifted a number of times corresponding to the integers.A large-scale matrix used for LDPC encoding created by substituting elements of a smaller base matrix with either all-zero square matrices or shifted identity matrices of a specific size (e.g., 81x81).
Shifted identity matrix
(Claim 1, Claim 6)
The base parity check matrix is expanded into an expanded parity check matrix by replacing each non-zero element by a shifted identity matrix. The integer s_ij represents a circular shifted LxL identity matrix, where the amount of the shift is determined by a specific formula or the integer value itself.A square identity matrix where the positions of the ones have been cyclically shifted to the right by a specified number of positions, used as a sub-matrix within the expanded parity check matrix.

Litigation Cases New

US Latest litigation cases involving this patent.

Case NumberFiling DateTitle
2:25-cv-00555May 19, 2025Malikie Innovations Ltd. et al v. Vivint Smart Home, Inc. et al

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US7917829

Application Number
US12796453A
Filing Date
Jun 8, 2010
Publication Date
Mar 29, 2011
External Links
Slate, USPTO , Google Patents