Patent No. US9529767 (titled "System and method for abstracting SATA and/or SAS storage media devices via a full duplex queued command interface to increase performance, lower host overhead, and simplify scaling storage media devices and systems") on Dec 6, 2013. The application was issued on Dec 27, 2016.
’767 is related to the field of storage device interfaces and data transport protocols. Specifically, it addresses the limitations of legacy SATA and SAS protocols, which are rooted in older parallel bus architectures. These traditional interfaces often impose significant overhead on the host processor, struggle with true full-duplex communication, and create complexities when a host must manage a heterogeneous mix of drive types and port expansion hardware.
The underlying idea behind ’767 is to decouple the host from the specific physical and logical constraints of SATA and SAS by pushing those legacy protocols to the extreme edge of the network. By using a performance-centric abstraction protocol, the host can communicate with a pool of storage devices using high-level commands that are agnostic of the underlying drive type. This shift allows the system to handle low-level tasks like error recovery, flow control, and command translation locally at the drive interface rather than taxing the central host resources.
The claims of ’767 focus on a routable packet-switched network architecture that utilizes a master controller and at least one edge controller. The master controller interfaces with the host and translates requests into a full-duplex abstraction protocol that supports comprehensive command queuing. The edge controller sits between this network and the physical storage media, managing the specific SATA or SAS signaling while also possessing the capability to act as a master to other downstream edge controllers for scalable routing.
In practice, this system functions by wrapping storage commands into routable packets that can be carried over standard high-speed fabrics like Ethernet or PCIe. When the host issues a large data request, the master controller breaks it down into the abstraction protocol, and the edge controller handles the granular execution on the physical disk. This creates a link-agnostic fabric where storage devices can be addressed by logical identifiers or unique global IDs, allowing for dynamic discovery and seamless scaling across multiple chassis or locations.
This approach differs from prior solutions by eliminating the need for the host to manage the SATA-Transport-Protocol or complex SAS expander hierarchies directly. By implementing a full-duplex queued interface at the abstraction layer, the invention prevents the command-flushing issues common in SATA Native Command Queuing and allows for the interleaving of read and write operations. The result is a storage fabric that behaves like a modern network, offloading the heavy lifting of protocol management to specialized hardware at the edge.
In the early 2010s when ’767 was filed, storage subsystem architectures were typically implemented using serial adaptations of legacy parallel protocols, such as SATA and SAS. At a time when systems commonly relied on these legacy-rooted protocols, high-speed serial links were often functionally restricted to half-duplex operations because the underlying command sets did not natively support full command queuing or the interleaving of read and write operations. Furthermore, when hardware constraints made scaling non-trivial, engineers were forced to manage high protocol overhead and complex host-side software layers to coordinate communication across disparate port multipliers and expanders that shared limited bandwidth.
The disclosed invention achieves a technical advancement by replacing legacy serial storage protocols with a routable packet-switched network governed by a full-duplex abstraction protocol. This architectural shift utilizes a master-edge controller hierarchy to decouple the host from the specific physical constraints and overhead of SATA or SAS interfaces. By implementing full command queuing through this abstracted network, the system overcomes the performance bottlenecks of half-duplex communication and enables greater scalability through cascaded edge controllers, effectively reducing host processing overhead while increasing aggregate storage throughput.
This patent contains a total of 19 claims, with claims 1 and 16 serving as the independent claims. The independent claims focus on a routable packet-switched network architecture that utilizes an abstraction protocol to facilitate communication between a host, master controllers, and edge controllers for managing storage media devices through full-duplex command queuing and hierarchical controller relationships. The dependent claims serve to further define the system by specifying support for SATA and SAS protocols, detailing dynamic routing methods based on logical or physical addresses, describing hardware implementations such as FPGAs or ASICs, and outlining specific host interface types and command resolution processes.
Definitions of key terms used in the patent claims.
US Latest litigation cases involving this patent.

The dossier documents provide a comprehensive record of the patent's prosecution history - including filings, correspondence, and decisions made by patent offices - and are crucial for understanding the patent's legal journey and any challenges it may have faced during examination.
Get instant alerts for new documents