Patent No. US9628816 (titled "Motion prediction in video coding") on Aug 29, 2016. The application was issued on Apr 18, 2017.
’816 is related to the field of video compression and decompression, specifically focusing on motion-compensated prediction techniques. In modern video codecs, blocks of pixels are often predicted by referencing other frames to reduce the amount of data that needs to be transmitted. When a block is predicted from multiple sources, such as in bi-directional prediction, the system must combine these different reference signals to form a single, accurate estimate of the current block.
The underlying idea behind ’816 is to minimize the accumulation of rounding errors by maintaining high-precision data throughout the prediction calculation process. Instead of rounding each individual reference signal to a standard bit-depth before combining them, the invention keeps the intermediate results at a higher bit-depth precision. By delaying the final rounding and bit-shifting until after the multiple prediction signals have been summed, the system preserves subtle image details that would otherwise be lost to truncation or rounding bias.
The claims of ’816 focus on a specific sequence of operations for multi-reference prediction where the pixel values are initially represented at a first precision. When a block is identified as being predicted from two or more reference blocks, the system performs fractional pixel sample interpolation to generate predictions at a second, higher precision. These high-precision predictions are then added together along with a rounding value, and only after this summation is the result shifted to the right to return the data to the original, lower precision.
In practice, this mechanism functions by using interpolation filters, such as a P-tap filter, to calculate sub-pixel values without immediately discarding the extra bits generated by the multiplication and addition steps. By using a delayed bit-shifting approach, the encoder and decoder can avoid the need for complex signaling of rounding offsets or alternating rounding directions between frames. This ensures that the final combined prediction is mathematically more accurate relative to the source material, even when using standard 8-bit or 10-bit video formats.
This approach differs from prior methods that typically rounded each prediction signal independently before averaging them, a process that frequently introduced cumulative errors and required extra code branches to manage rounding bias. By maintaining intermediate precision in the registers during the combining phase, the invention simplifies the codec architecture while simultaneously improving coding efficiency. The result is a more streamlined hardware or software implementation that produces higher-quality reconstructed video without increasing the bitrate.
In the early 2010s when ’816 was filed, video compression architectures were typically implemented using hybrid coding frameworks that utilized inter-frame prediction to reduce temporal redundancy. At a time when systems commonly relied on rounding intermediate pixel values to a standard bit-depth immediately after interpolation, the accumulation of rounding errors across multiple prediction stages was a known engineering trade-off. When hardware or software constraints made high-precision arithmetic throughout the entire motion compensation pipeline non-trivial, encoders often utilized rounding direction indicators or specific offsets within the bitstream to mitigate these errors, adding complexity to the signaling overhead and the decoding process.
The disclosed invention represents a technical advancement through an architectural shift in how multi-directional prediction signals are processed and combined. By maintaining individual prediction signals at a higher precision than the original pixel bit-depth throughout the interpolation and combination stages, the system overcomes the constraint of cumulative rounding bias inherent in sequential rounding operations. This integration of high-precision intermediate buffers allows for a single precision-reduction step (such as a downshift) to be performed only after the reference blocks are combined, which enables the achievement of higher prediction accuracy and eliminates the technical requirement for signaling rounding offsets or varying rounding methods between frames.
The patent includes a total of 26 claims, with claims 1, 8, 15, 19, and 23 serving as the independent claims. These independent claims focus on a method, apparatus, and computer program product for video encoding or decoding that manages pixel precision during multi-reference block prediction by obtaining high-precision predictions through fractional interpolation, combining them with a rounding value, and subsequently decreasing the precision via bit-shifting. The dependent claims generally serve to further define the process by specifying integer sample handling, the application of specific rounding offsets, the use of intermediate precision levels, and the identification of the block as bi-directional or multidirectional.
Definitions of key terms used in the patent claims.
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