The detailed information for PTAB case with proceeding number IPR2019-00028 filed by Intel Corporation against Godo Kaisha IP Bridge 1 on Oct 2, 2018. This includes filing dates, application numbers, tech centers, patent numbers, and current case status.

Case Details

Proceeding Number
IPR2019-00028
Filing Date
Oct 2, 2018
Petitioner
Intel Corporation
Respondent
Godo Kaisha IP Bridge 1
Status
Terminated-Settled
Respondent Application Number
09469498
Respondent Tech Center
2800
Respondent Patent Number
6346736
Termination Date
Feb 13, 2019

Proceeding Documents

The table below shows documents filed in the case, listing each document name, filing date, document type, and filing party. Tracking these filings indicates the activity of the parties involved in the case, and the types of documents filed can provide insights into the legal strategies being employed.


Document NameFiling DateCategoryFiling Party

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ORDER Dismissal of the Proceedings 35 U.S.C. § 317(a) and 37 C.F.R. § 42.74

Feb 13, 2019PAPERBOARD

Joint Motion to Dismiss and Terminate Proceedings Pursuant to 35 U.S.C. Section 317(a) and 37 C.F.R. Sections 42.72, 42.74

Feb 4, 2019PAPERPETITIONER

Joint Request to Treat Settlement Agreement As Business Confidential Information

Feb 3, 2019PAPERPETITIONER

Patent License Agreement (CONFIDENTIAL)

Feb 3, 2019EXHIBITPETITIONER

U.S. Patent No. 5,731,623 Ishimaru

Jan 14, 2019EXHIBITPATENT OWNER

U.S. Patent No. 5,663,588 Suzuki

Jan 14, 2019EXHIBITPATENT OWNER

Patent Owners Preliminary Response

Jan 14, 2019PAPERPATENT OWNER

File History of U.S. Patent No. 6,130,139

Jan 14, 2019EXHIBITPATENT OWNER

Paper 2 of IPR2018-00756

Jan 14, 2019EXHIBITPATENT OWNER

Paper 9 of IPR2018-00756

Jan 14, 2019EXHIBITPATENT OWNER

Abstract of JPH08227935

Jan 14, 2019EXHIBITPATENT OWNER

Paper 2 of IPR2017-00765

Jan 14, 2019EXHIBITPATENT OWNER

Declaration of Joseph B. Palmieri

Jan 14, 2019EXHIBITPATENT OWNER

Patent Owners Mandatory Notice

Oct 23, 2018PAPERPATENT OWNER

Patent Owners Power of Attorney

Oct 23, 2018PAPERPATENT OWNER

Notice of Accord Filing Date

Oct 12, 2018PAPERBOARD

Petitioner's Power of Attorney Pursuant to 37 C.F.R. 42.10(b)

Oct 2, 2018PAPERPETITIONER

Declaration of Dr. John C. Bravman

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 6,346,736

Oct 2, 2018EXHIBITPETITIONER

File History of U.S. Patent No. 6,346,736 (¿¿¿File History¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

Saraswat and Mohammadi, ¿¿¿Effect of scaling of interconnections on the time delay of VLSI circuits,¿¿¿ IEEE Journal of Solid-State Circuits, Vol. SC-17, No. 2, April 1982 (¿¿¿Saraswat¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

Petition for Inter Partes Review of U.S. Patent No. 6,346,736

Oct 2, 2018PAPERPETITIONER

Curriculum Vitae of Dr. John C. Bravman

Oct 2, 2018EXHIBITPETITIONER

Assignment History U.S. Patent No. 6,346,736

Oct 2, 2018EXHIBITPETITIONER

Sedra, Adel S., Microelectronics Circuits, Oxford University Press, Inc. (3rd 3d., 1991)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 5,107,320 (¿¿¿Iranmanesh¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

Uyemura, Fundamentals of MOS Digital Integrated Circuits, Addison-Wesley Publishing Co (1988)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 5,702,976 (¿¿¿Schuegraf¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 4,957,590 (¿¿¿Douglas¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 6,165,826 (¿¿¿Chau¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 5,814,848 (¿¿¿Oshima¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

Moore, Gordon E. ¿¿¿Cramming More Components Onto Integrated Circuits.¿¿¿ Electronics, vol. 38, no. 8, Apr. 19, 1965 (¿¿¿Moore¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 4,960,725 (¿¿¿Noguchi¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 4,786,609 (¿¿¿Chen¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

Panasonic Press Release, ¿¿¿Matsushita Electric Becomes Panasonic Corporation¿¿¿ October 1, 2008, Available at http://news.panasonic.com/global/press/data/en081001-4/en081001-4.html

Oct 2, 2018EXHIBITPETITIONER

Japanese Patent Publication No. JPH08-227935 (¿¿¿Yabu¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

Dorf and Tallarida, Pocket Book of Electrical Engineering Formulas, CRC Press (1993)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 4,519,128 (¿¿¿Chesebro¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 4,571,819 (¿¿¿Rogers¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 5,976,939 (¿¿¿Thompson¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

U.S. Patent No. 5,733,812 (¿¿¿Ueda¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

Appels, J. A., et al. ¿¿¿Some Problems of MOS Technology.¿¿¿ Philips Technical Review, vol. 31, nos. 7/8/9, 1970 (¿¿¿Appels¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

Excerpts from Downeast Analytics, LLC Mar. 4, 2016 Search Report (¿¿¿2016 Search Report¿¿¿)

Oct 2, 2018EXHIBITPETITIONER

Certified English Translation of Japanese Patent Publication No. JPH08-227935 (¿¿¿Yabu Translation¿¿¿)

Oct 2, 2018EXHIBITPETITIONER