PHISON ELECTRONICS CORPORATION vs Vervain, LLC

Institution Decision: Deny

Correspondence from the Board

EXPUNGED

Patent Owner's Preliminary Response

Declaration of Dr. Sunil Khatri

Chen et al., Ultra MLC Technology Introduction, Advantech Technical White Paper (Oct. 5, 2012) (“Chen”)

Excerpts from Micheloni et al., Inside NAND Flash Memories (1st ed. 2010) (“Micheloni”)

Vervain v. Western Digital Corp. et al., No. 6:21-cv-488-ADA, Dkt. 41 (W.D. Tex. Jan. 24, 2022) (Claim Construction Order)

Vervain, LLC v. Phison Electronics Corporation, No. 1:24-CV-259- ADA, Dkt. 16 (W.D. Tex. Jul. 15, 2024) (agreed scheduling order)

“Judge Albright Patent FAQ,” https://www.txwd.uscourts.gov/forattorneys/ judge-albright-courtroom-faq/. Accessed December 18, 2024)

Phison Electronics Corp. v. Vervain, LLC, PGR2024-00047, Paper 2 (P.T.A.B. Aug. 27, 2024) (petition for post grant review of U.S. Patent No. 11,830,546)

Preliminary Claim Constructions for Vervain, LLC v. Phison Electronics Corporation, No.1:24-cv-259-ADA and Vervain, LLC v. Kingston Technology Company., et al., No. 1:24-cv-254-ADA – email from Mr. Brown received on February 5, 2025.

Markman Hearing Transcript dated February 6, 2025, for Vervain, LLC v. Phison Electronics Corporation, No. 1:24-cv-259-ADA and Vervain, LLC v. Kingston Technology Company., et al. No. 1:24-cv- 254-ADA.

Vervain v. Western Digital Corp. et al., No. 6:21-cv-00488-ADA, Dkt. 180 (W.D. Tex. Jul. 26, 2023) (Redacted Copy of Order on the Pending Motions and Motions In Limine).

Phison’s Exhibit A1 Claim Chart, served with its Final Invalidity Contentions on February 28, 2025 in Vervain, LLC v. Phison Electronics Corporation, No. 1:24-CV-259-ADA (W.D. Tex.) (charting U.S. Patent No. 8,891,298 as obvious under 35 U.S.C. § 103 based on U.S. Patent No. 8,634,240 (“Gavens”))

Phison’s Exhibit A3 Claim Chart, served with its Final Invalidity Contentions on February 28, 2025 in Vervain, LLC v. Phison Electronics Corporation, No. 1:24-CV-259-ADA (W.D. Tex.) (charting U.S. Patent No. 8,891,298 as obvious under 35 U.S.C. § 103 based on U.S. Patent Appl. Pub. No. 2009/0327591 (“Moshayedi”))

Phison’s Exhibit A2 Claim Chart, served with its Final Invalidity Contentions on February 28, 2025 in Vervain, LLC v. Phison Electronics Corporation, No. 1:24-CV-259-ADA (W.D. Tex.) (charting U.S. Patent No. 8,891,298 as obvious under 35 U.S.C. § 103 based on U.S. Patent Appl. Pub. No. 2008/0140918 (“Sutardja”))

Vervain, LLC v. Phison Electronics Corp., No. 1:24-cv-00259, Dkt. 53 (W.D. Tex. Jan. 29, 2025) (Joint Notice Extending Deadlines)

Docket Sheet for Vervain, LLC v. Phison Electronics Corporation, No. 1:24-CV-259-ADA (W.D. Tex.). Accessed March 11, 2025.

Phison Electronics Corp. v. Vervain, LLC, PGR2024-00047, Paper 9 (P.T.A.B. Mar. 17, 2024) (Decision Denying Institution of Post-Grant Review of U.S. Patent No. 11,830,546)

Vervain, LLC v. Western Digital Corp. et al., No. 6:21-cv-00488- ADA, Dkt. No. 183, Pretrial Hearing Redacted Transcript (W.D. Tex. Aug. 7, 2023)

Patent Owner's Updated Mandatory Notice

EXPUNGED

Notice: Notice filing date accorded -Corrected

Notice : Mandatory Notice

Notice : Power of Attorney

U.S. Patent No. 8,891,298

U.S. Provisional Application No. 61/509,257

U.S. Patent No. 7,855,916

Excerpts from INSIDE NAND FLASH MEMORIES

Excerpts from NONVOLATILE MEMORY TECHNOLOGIES WITH EMPHASIS ON FLASH

Excerpts from MICROSOFT COMPUTER DICTIONARY

Program Interference in MLC NAND Flash Memory...

A 3.3V32Mb NAND Flash Memory with Incremental Step Pulse Programming Scheme

Error Characterization and Coding Schemes for Flash Memories

Enterprise MLC: How flash vendors are boosting MLC write endurance

SLC & MLC Hybrid

Adaptive Endurance Coding for NAND Flash

A Flexible Flash File System for MLC NAND Flash Memory

Asymmetric Flash Volume Management

Intel StrataFlash™ Memory Technology Overview

A 3.3V1 Gb multi-level NAND flash memory with non-uniform...distribution

U.S. Patent No. 6,456,528

U.S. Patent No. 8,078,794

U.S. Patent Appl. Pub. No. 2008/0140918

U.S. Patent Appl. Pub. No. 2009/0327591

U.S. Patent Appl. Pub. No. 2010/0172179

U.S. Patent No. 8,634,240

U.S. Patent No. 8,806,301

U.S. Patent Appl. Pub. No. 2010/0115192

U.S. Patent Appl. Pub. No. 2011/0271043

U.S. Patent Appl. Pub. No. 2011/0153912

U.S. Patent No. 5,930,167

U.S. Patent Appl. Pub. No. 2010/0172180

U.S. Patent Appl. Pub. No. 2009/0268513

U.S. Patent Appl. Pub. No. 2009/0307418

U.S. Patent Appl. Pub. No. 2010/0058018

High-Voltage Regulation and Process Considerations...

A 128K Flash EEPROM Using Double-Polysilicon Technology

An Experimental 4-Mbit CMOS EEPROM with a NAND-Structured Cell

A survey of Flash Translation Layer

A High-Density NAND EEPROM ...

Write Endurance in Flash Drives: Measurements and Analysis

Increasing Flash SSD Reliability

A Dual-Mode NAND Flash Memory

A Multipage Cell Architecture ...

Docket list for Vervain, LLC v. Phison Electronics Corp

Docket list for Vervain, LLC v. Kingston

First Amended Complaint, Doc. No. 9

Signed Agreed Scheduling Order, Doc. No. 16

Notice : Power of Attorney

Excerpts from prosecution history of ’298 patent

Declaration of Carl Sechen, Ph.D..

Petition : as filed