Micron Technology Inc. et al. v. Palisade Technologies, LLP - IPR2025-01009

Email, Subject_IPR2025-01008 and IPR2025-01009 Director Review Requests

Petitioner's Updated List of Exhibits

Petitioner’s Request for Director Review

Micron (New York)

Micron and Trump Administration Announce Expanded U.S. Investments

Inventors Explore Funding

Micron Company Timeline

A Study of Unpatentability Finding in IPR FWDs

Executive Order No. 14,215

Why Memory and Storage Matter for AI

Automotive

Industrial IoT

Secretary Howard Lutnick LinkedIn Video

US Plans 1:1 Chip Production Rule to Curb Overseas Reliance

Beijing Set Out to Destroy U.S. Economic Supremacy

Speaker Johnson Outlines Roadmap for America’s Industrial Comeback

Second Amended Complaint (Redacted Version) (24-cv-262)

Nomination of John A. Squires

Memorandum from Director Squires to All PTAB Judges

Semiconductor Supply Chain Resilience and Disruption

Two Lessons the Chip Shortage Taught Us about Supply Chains

Semiconductors’ Crisis: The Great Supply Chain Disruption

America’s AI Action Plan

Anaqua Analysis of USPTO Patenting Statistics

Pl.’s Objections and Responses to Defs’ First Set of Interrogatories (Nos. 1-17)

Director Discretionary Decision: Deny

Patent Owner's Preliminary Response

Petitioners’ Opposition to Patent Owner’s Request for Discretionary Denial

Palisade Incorporation Records

Palisade Patent Assignment Records

Complaint

Zillow

Micron Technology Corporate Profile

Micron’s expansion and modernization plans for Virginia Facility

Micron Announces Massive CHIPS Investment, Onshoring Production

President Trump Secures $200B Investment from Micron Technology for Memory Chip Manufacturing in the United States

Department of Commerce Awards CHIPS Incentives to Micron for Idaho and New York Projects

Judge Counts’ Standing Order Governing Patent Proceedings

The Patent Trial and Appeal Board and Inter Partes Review

Federal Court Management Statistics

Scheduling Order

Plaintiff’s Preliminary Infringement Contentions

Did Sotera Stipulations Solve the Fintiv Criticisms?

IPR Estoppel’s Evolving Landscape

PTAB Ramps Up Fintiv Denials After Withdrawal of Memo

Brief of The National Retail Federation, The High Tech Inventors Alliance, et al., as Amici Curiae in Support of Apple and Reversal

Micron’s First Supplemental Objections and Responses to Plaintiff Palisade Technologies, LLP’s Venue-Related 30(b)(6) Notice

Locations

Micron and Western Digital: The future of the national semiconductor technology center

Western Digital Completes Acquisition Of SanDisk, Creating A Global Leader In Storage Technology

Micron’s Preliminary Invalidity Contentions for U.S. Patent Nos. 8,148,962; 8,327,051; and 9,281,314

U.S. District Court for the Western District of Texas Dockets

Petition for Writ of Mandamus

Patent assignment 028417/0494 (Interstellar ’825 patent assignment records)

Assignment abstract of title for Application 15141769 (Bristol- Meyers Squibb ’113 patent assignment records)

Assignment abstract of title for Application 14400667 (Bristol- Meyers Squibb ’320 patent assignment records)

Assignment abstract of title for Application 15352255 (Gogo ’600 patent assignment records)

Assignment abstract of title for Application 14984422 (SitePro ’014 patent assignment records)

Assignment abstract of title for Application 14147190 (SitePro ’078 patent assignment records)

Assignment abstract of title for Application 13708557 (SitePro ’909 patent assignment records)

U.S. Patent No. 8,492,224 to Purayath et al. (“Purayath-224”)

IPR2025-01009 Discretionary Denial Briefing

Ex. 2001

Ex. 2002

Ex. 2003

Ex. 2004

Petitioner's Updated List of Exhibits

Notice of Defendants’ Stipulation Regarding Invalidity Challenges (24-cv-262)

EXPUNGED

Notice: Other

Notice: Mandatory Notice

Notice: Power of Attorney

Petition: as filed

Micron Technology, Inc.’s Power of Attorney

Micron Semiconductor Products, Inc.’s Power of Attorney

U.S. Patent No. 9,281,314

Declaration of Dr. David Kuan-Yu Liu

Curriculum Vitae of Dr. David Kuan-Yu Liu

Prosecution History of the ’314 Patent

U.S. Patent No. 7,598,564 (“Kang”)

U.S. Patent Application Pub. No. 2007/0096202 (“Kang-1”)

U.S. Patent Application Pub. No. 2011/0309425 (“Purayath”)

U.S. Patent No. 7,759,722 (“Murata”)

Claim Mapping Table

Inside NAND Flash Memories

Complaint (24-cv-262)

First Amended Complaint (24-cv-262)

A Comprehensive Guide to Understanding and Using NVSM Devices

Influence of the Oxidation in the Metal Silicide/Si3N4 Interfaces

The Future of Charge Trapping Memories

U.S. Patent No. 9,589,978 (“Yip”)

NAND Flash Memory Technologies (Part 1)

NAND Flash Memory Technologies (Part 2)

3D NAND: Benefits of Charge Traps over Floating Gates

U.S. Patent No. 6,859,397 (“Lutze”)

Silicon Processing for the VLSI Era

Effect of low-k dielectric material on 63nm MLC NAND flash cell arrays

The Air Spacer Technology for Improving the Cell Distribution