Excelliance Mos Corporation - IPR2025-01433

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U.S. Patent No. 7,629,634 (the “’634 Patent” or “’634”)

File History of the ’634 Patent

Expert Declaration of Dr. Daniel Foty

Expert Curriculum Vitae of Dr. Daniel Foty

U.S. Patent Publication No. 2006/0273384 A1 (“Hshieh” or “’384”)

U.S. Patent No. 6,984,864 (“Uno” or “’864”)

B. Davari et al., A Variable-Size Shallow Trench Isolation (STI) Technology

Stanley Wolf, Silicon Processing for the VLSI Era, Vol. 2, 191, 281, 385-38

S. Van Huylenbroeck et al., A 0.25um SiGe BiCMOS Technology Including Integ

U.S. Patent No. 5,395,786

H. Shichijo et al., Trench Transistor DRAM Cell, IEEE Electron Device Lette

Metal Insulator Semiconductor Field Effect Transistors (MISFETs), EEEGUIDE,

Adel S. Sedra and Kenneth C. Smith, Microelectronics Circuits, 237 (5th ed.

U.S. Patent No. 4,980,747

Stanley Wolf, Silicon Processing for the VLSI Era, Vol. 1, 124 (1986)

Ashwin H. Shah et al., A 4-Mbit DRAM with Trench-Transistor Cell, IEEE Jour

Properties of SiO2 and Si3N4 at 300K, Comprehensive Reference on EESEMI Sem

A. S. Grove, Physics and Technology of Semiconductor Devices, 330 (1967)

Force Mos Technology, Co. Ltd. v. AsusTek Computer, Inc. ECF No. 416 Transc

Genshu Fuse et al., Indirect Trench Sidewall Doping by Implantation of Refl

S. E. Berberich et al., Trench Sidewall Doping for Lateral Power Devices, C

Michael Quirk and Julian Serda, Semiconductor Manufacturing Technology, 475

A. Agrawal et al., Self-Sealed Circular Channels for Micro-Fluidics, Sensor

D. Edelstein et al., Full Copper Wiring in a Sub-0.25 um CMOS ULSI Technolo

S. Nizou et al., Deep Trench Doping by Plasma Immersion Ion Implantation in

Force Mos Technology, Co. Ltd. v. AsusTek Computer, Inc. ECF No. 132 Order