Micron Technology, Inc. et al. - IPR2025-01559

Explore the PTAB proceeding IPR2025-01559 filed by Micron Technology, Inc. et al. on Oct 15, 2025. This includes filing dates, application numbers, tech centers, patent numbers, and current case status.

Case Details

Proceeding Number
IPR2025-01559
Filing Date
Oct 15, 2025
Petitioner
Micron Technology, Inc. et al.
Status
Petition filed
Respondent Application Number
14806111
Respondent Tech Center
2800
Respondent Patent Number
9524974

Proceeding Decision New

Decision pending - set alert to receive updates

Proceeding Documents

The table below shows documents filed in the case, listing each document name, filing date, document type, and filing party. Tracking these filings indicates the activity of the parties involved in the case, and the types of documents filed can provide insights into the legal strategies being employed.

Document NameFiling DateCategoryFiling Party

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Micron Technology, Inc.’s Power of Attorney

Oct 15, 2025PAPERPETITIONER

Micron Semiconductor Products, Inc.’s Power of Attorney

Oct 15, 2025PAPERPETITIONER

Petition: as filed

Oct 15, 2025PAPERPETITIONER

U.S. Patent No. 9,524,974

Oct 15, 2025EXHIBITPETITIONER

Declaration of Dr. David Kuan-Yu Liu

Oct 15, 2025EXHIBITPETITIONER

Curriculum Vitae of Dr. David Kuan-Yu Liu

Oct 15, 2025EXHIBITPETITIONER

Prosecution History of the ’974 Patent

Oct 15, 2025EXHIBITPETITIONER

U.S. Patent No. 8,592,978 (“Matsuno”)

Oct 15, 2025EXHIBITPETITIONER

U.S. Patent App. Pub. No. 2015/0162277 (“Zhang”)

Oct 15, 2025EXHIBITPETITIONER

U.S. Patent No. U.S. Patent No. 6,500,765 (“Kao”)

Oct 15, 2025EXHIBITPETITIONER

U.S. Patent App. Pub. No. 2011/0032763 (“Kwak”)

Oct 15, 2025EXHIBITPETITIONER

Claim Mapping Table

Oct 15, 2025EXHIBITPETITIONER

Inside NAND Flash Memories

Oct 15, 2025EXHIBITPETITIONER

Complaint (24-cv-00262)

Oct 15, 2025EXHIBITPETITIONER

First Amended Complaint (24-cv-00262)

Oct 15, 2025EXHIBITPETITIONER

Second Amended Complaint (Redacted Version) (24-cv-00262)

Oct 15, 2025EXHIBITPETITIONER

Double patterning lithography: double the trouble or double the fun?

Oct 15, 2025EXHIBITPETITIONER

U.S. Patent No. 6,204,200

Oct 15, 2025EXHIBITPETITIONER

22nm Half-Pitch Patterning

Oct 15, 2025EXHIBITPETITIONER

NAND Flash Memory Technologies

Oct 15, 2025EXHIBITPETITIONER

U.S. Patent No. 9,123,776

Oct 15, 2025EXHIBITPETITIONER

U.S. Patent No. 9,595,477

Oct 15, 2025EXHIBITPETITIONER

U.S. Patent App. Pub. No. 2008/0014760 (“Murata”)

Oct 15, 2025EXHIBITPETITIONER

Effect of low-k dielectric material on 63nm MLC NAND flash cell arrays

Oct 15, 2025EXHIBITPETITIONER

The Air Spacer Technology for Improving the Cell Distribution

Oct 15, 2025EXHIBITPETITIONER

A stacked memory device on logic 3D technology

Oct 15, 2025EXHIBITPETITIONER

Electrical Techniques for the Characterization of Dielectric Films

Oct 15, 2025EXHIBITPETITIONER

U.S. Patent No. 5,707,901

Oct 15, 2025EXHIBITPETITIONER

Self-Aligned Double Patterning

Oct 15, 2025EXHIBITPETITIONER

3D-interconnect

Oct 15, 2025EXHIBITPETITIONER

Dielectric Barrier, Etch Stop, and Metal Capping Materials

Oct 15, 2025EXHIBITPETITIONER

Claim Construction Order (24-cv-00262)

Oct 15, 2025EXHIBITPETITIONER