IP Verse

Citadel Securities LLC v. HFT Solutions, LLC - IPR2026-00151

Explore the PTAB proceeding IPR2026-00151 filed by Citadel Securities LLC against HFT Solutions, LLC on Dec 3, 2025. This includes filing dates, application numbers, tech centers, patent numbers, and current case status.

Case Details

Proceeding Number: IPR2026-00151
Filing Date: Dec 3, 2025
Petitioner: Citadel Securities LLC
Respondent: HFT Solutions, LLC
Status: Pending
Respondent Application Number: 17723145
Respondent Tech Center: 2800
Respondent Patent Number: 11575381

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Proceeding Documents

The table below shows documents filed in the case, listing each document name, filing date, document type, and filing party. Tracking these filings indicates the activity of the parties involved in the case, and the types of documents filed can provide insights into the legal strategies being employed.

Show Exhibit Documents

Document Name	Filing Date	Category	Filing Party
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Petitioner's Motion for Pro Hac Vice Admission of Matthew R. Ford Under 37 C.F.R. 42.10(c)	Feb 6, 2026	PAPER	PETITIONER
PATENT OWNER’S REQUEST FOR DISCRETIONARY DENIAL OF INSTITUTION	Feb 5, 2026	PAPER	PATENT OWNER
Exhibit 2001 - HFT Solutions, LLC v. Jump Trading LLC, 1:24-cv-13214 - Agreed Schedule	Feb 5, 2026	EXHIBIT	PATENT OWNER
Exhibit 2002 - HFT Solutions, LLC v Optiver US LLC et al, Case No. 7:25-cv-00415 - Scheduling Order	Feb 5, 2026	EXHIBIT	PATENT OWNER
Exhibit 2003 - HFT Solutions, LLC v. Citadel Securities LLC, 1:24-cv-13214 – Motion to Dismiss	Feb 5, 2026	EXHIBIT	PATENT OWNER
Exhibit 2004 - HFT Solutions, LLC v. Citadel Securities LLC, 1:24-cv-13214 – Order Denying Motion to Dismiss	Feb 5, 2026	EXHIBIT	PATENT OWNER
Exhibit 2005 - HFT Solutions, LLC v. Citadel Securities LLC, 1:24-cv-13214 (N.D. Ill.) – Final Invalidity Contentions	Feb 5, 2026	EXHIBIT	PATENT OWNER
Exhibit 2006 - HFT Solutions, LLC v. Citadel Securities LLC, 1:24-cv-13214 – Agreed Schedule	Feb 5, 2026	EXHIBIT	PATENT OWNER
Exhibit 2007 - HFT Solutions, LLC v. Citadel Securities LLC, 1:24-cv-13214 –Final Invalidity Contentions Exhibit B-3	Feb 5, 2026	EXHIBIT	PATENT OWNER
Exhibit 2008 - HFT Solutions, LLC v. Citadel Securities LLC, 1:24-cv-13214 – Citadel Securities Answer, Affirmative Defenses, and Counterclaims	Feb 5, 2026	EXHIBIT	PATENT OWNER
Exhibit 2009 - U.S. Patent No. 10,931,286	Feb 5, 2026	EXHIBIT	PATENT OWNER
Exhibit 2010 - Email title “HFT v. Citadel – deadlines” from Meg Fasulo to Dale Chang dated May 2, 2025	Feb 5, 2026	EXHIBIT	PATENT OWNER
Notice: Mandatory Notice	Jan 13, 2026	PAPER	PATENT OWNER
Notice: Power of Attorney	Jan 13, 2026	PAPER	PATENT OWNER
Notice: Notice filing date accorded	Dec 5, 2025	PAPER	BOARD
U.S. Patent No. 11,575,381	Dec 3, 2025	EXHIBIT	PETITIONER
Declaration of Kevin B. Stanton, Ph.D.	Dec 3, 2025	EXHIBIT	PETITIONER
File History (U.S. Patent No. 11,575,381)	Dec 3, 2025	EXHIBIT	PETITIONER
Altera White Paper - Synchronous Ethernet Solutions with Altera FPGAs	Dec 3, 2025	EXHIBIT	PETITIONER
Stratix V Device Handbook	Dec 3, 2025	EXHIBIT	PETITIONER
Silicon Labs Si4345-44 Family Reference Manual	Dec 3, 2025	EXHIBIT	PETITIONER
Lockwood, A Low-Latency Library in FPGA Hardware (HFT)	Dec 3, 2025	EXHIBIT	PETITIONER
HFT Solutions' Response in Opposition to Motion to Dismiss	Dec 3, 2025	EXHIBIT	PETITIONER
Affidavit of Mina Chung (Altera)	Dec 3, 2025	EXHIBIT	PETITIONER
Affidavit of Mina Chung (Stratix Handbook)	Dec 3, 2025	EXHIBIT	PETITIONER
Affidavit of Mina Chung (Si5345 Manual)	Dec 3, 2025	EXHIBIT	PETITIONER
HFT Solutions, LLC's Infringement Contentions	Dec 3, 2025	EXHIBIT	PETITIONER
Altera and IDT Synchronous Ethernet Solution for ITU-T G.8262	Dec 3, 2025	EXHIBIT	PETITIONER
The Race to Zero Latency for High Frequency Trading	Dec 3, 2025	EXHIBIT	PETITIONER
U.S. Patent No. 10,169,814	Dec 3, 2025	EXHIBIT	PETITIONER
Irene Aldridge, High Frequency Trading (Second Edition)	Dec 3, 2025	EXHIBIT	PETITIONER
Implementing Fractional PLL Reconfiguration with Altera PLL	Dec 3, 2025	EXHIBIT	PETITIONER
Exploring Algorithmic Trading in Reconfigurable Hardware	Dec 3, 2025	EXHIBIT	PETITIONER
Douglas J. Smith, HDL Chip Design	Dec 3, 2025	EXHIBIT	PETITIONER
UltraScale Architecture Clocking Resources User Guide	Dec 3, 2025	EXHIBIT	PETITIONER
Chip Hall of Fame: Xilinx XC2064 FPGA	Dec 3, 2025	EXHIBIT	PETITIONER
List and Comparison of FPGA Companies	Dec 3, 2025	EXHIBIT	PETITIONER
Understanding Clock Domain Crossing (CDC) Checks and Techniques	Dec 3, 2025	EXHIBIT	PETITIONER
Floyd M. Gardner, Phaselock Techniques	Dec 3, 2025	EXHIBIT	PETITIONER
Interactive Brokers Founder Changed Trading Forever (Barrons)	Dec 3, 2025	EXHIBIT	PETITIONER
Wall Street's Quest to Process Data at the Speed of Light (Rubinow)	Dec 3, 2025	EXHIBIT	PETITIONER
FPGA accelerated low-latency market data feed processing (Morris et al)	Dec 3, 2025	EXHIBIT	PETITIONER
The Once and Future Ethernet	Dec 3, 2025	EXHIBIT	PETITIONER
An Introduction to Synchronized Internet	Dec 3, 2025	EXHIBIT	PETITIONER
A. Frank D'Souza, Design of Control Systems	Dec 3, 2025	EXHIBIT	PETITIONER
Altera, Clock Networks and PLLs in Stratix V Devices	Dec 3, 2025	EXHIBIT	PETITIONER
Notice: Power of Attorney	Dec 3, 2025	PAPER	PETITIONER
Petition for Inter Partes Review	Dec 3, 2025	PAPER	PETITIONER